An integrated semiconductor circuit device is ordinarily produced by successively forming patterns of desired circuit components on the surface of a semiconductor wafer. Two methods are known to produce such semiconductor integrated circuits, one being the light exposure method using photomasks and the other being the direct or unmasked exposure method using an electron beam. The direct exposure method using an electron beam dispenses with a masking medium and is useful for forming circuit patterns with the fineness of the order of 1 micron or less since the semiconductor wafer is irradiated directly with the electron beam on the basis of prescribed master data. Another advantage of the direct electron-beam exposure method is the reduction in the period of time required for the fabrication of the semiconductor integrated circuits. Such an advantage is of importance especially where a small number of semiconductor integrated circuit devices are to be fabricated for research and development use.
To produce a semiconductor integrated circuit device by the known direct exposure method using an electron beam, registration marks are first formed on the surface of the semiconductor wafer by, for example, a photoresist etching process. The registration marks thus provided on the wafer are probed by an electron beam during formation of a circuit pattern of each layer so that the circuit patterns of the individual layers accurately register with each other. The patterns of the desired circuit components formed on the semiconductor wafer in this fashion can be located on the wafer far more accurately than the circuit patterns produced by the light exposure method using photomasks. It is known that the errors caused in locating the patterns in a semiconductor integrated circuit fabricated by this direct exposure method can be reduced to the order of 1 micron or even less.
A photomask used in the prior-art light exposure method has provided thereon not only the circuit patterns to be produced but also the target marks in accordance with which the circuit patterns are to be located on the semiconductor wafer. Each of the photomasks carrying the patterns of the individual layers is positioned on a semiconductor wafer by using the target marks as references for correctly positioning the photomasks on the wafer. The light exposure method using such masking media has drawbacks in that not only a relatively long period of time is required for the preparation of the photomasks but it is difficult to form patterns with a satisfactory degree of fineness. The fineness of the circuit patterns produced by the light exposure method is usually of the order of about 2 microns or more.
These drawbacks of the light exposure method are not involved in the direct exposure method using an electron beam and dispensing with a photomask. A problem is however encountered in the conventional direct exposure method in that too much time must be expended for the irradiation of the semiconductor wafer with an electron beam until the circuit patterns of all the layers are produced on the wafer.
The drawbacks inherent in the two prior-art exposure methods could be eliminated if such methods are combined together. Combining these methods together had however been believed technically impossible until such an attempt was realized by the invention disclosed in Japanese patent application No. 56-137445 filed on Sept. 1, 1981 in the name of Pioneer Electronic Corporation, Japan. The difficulty of combining these methods together results primarily from the incompatibility between the registration marks used in the electronbeam exposure method and the target marks used in the light exposure method. Thus, the invention disclosed in the named patent application owes to the success achieved in providing compatibility between the two kinds of reference marks.